1. Field of the Invention
The invention generally relates to sense amplifiers and more specifically relates to sense amplifiers in FLASH memory devices.
2. Description of the Related Art
Most memory technology employs sense amplifiers. These sense amplifiers are typically designed for low current inputs with high gain and rapid response times. However, memory technology also often involves selecting a particular cell and letting that cell pull a node down or up, to a different value from what the node is biased to when no cell is selected. That node is typically the input node of the sense amplifier. As a result, the fastest sense amplifier is of little use if the input node can only be pulled to a different voltage slowly by the memory cell.
One method for providing a memory cell that can rapidly pull a node up or down is to use a large transistor in the memory cell, thus allowing for high current which may pull the node to the desired voltage. However, the larger the transistor, the more space the memory cell requires, and therefore the lower the density of memory cells can be on a given memory chip. Furthermore, a larger transistor may have increased capacitive coupling effects which will lead to a slower transition from a non-conductive to a conductive state, resulting in a property of the larger transistor defeating the purpose of having the larger transistor.
In one embodiment, the invention is an apparatus. The apparatus includes a column load component and a current mirror coupled in parallel with the column load component. The column load component is capable of being coupled to a FLASH cell and a sense amplifier.